This one-day workshop aims to bring together researchers interested in optimizing database performance on modern computing infrastructure by designing new data management techniques and tools.
The continued evolution of computing hardware and infrastructure imposes new challenges and bottlenecks to program performance. As a result, traditional database architectures fail to utilize hardware resources efficiently. Multi-core CPUs, various accelerators (GPUs, FPGAs, etc.), as well as new memory and storage technologies and interconnects provide great opportunities for optimizing database performance. Consequently, exploiting the characteristics of modern hardware has become an essential topic of database systems research.
The goal is to make database systems adapt automatically to sophisticated hardware characteristics, thus maximizing performance transparently for applications. To achieve this goal, the data management community needs interdisciplinary collaboration with researchers from computer architecture, compilers, operating systems, and storage. This involves rethinking traditional data structures, query processing algorithms, and database software architectures to adapt to the advances in the underlying hardware infrastructure.
We seek submissions bridging database systems to computer architecture, compilers, and operating systems. We also invite submissions for papers on hardware/software co-design for modern data-intensive workloads (including, but not limited to machine learning training and inference, graph analytics, and similar tasks). As these workloads continue to grow in scale and complexity, innovative co-design approaches that tightly integrate hardware architectures and software systems are crucial to achieving breakthroughs in performance, energy efficiency, and scalability. In particular, submissions covering topics from the following non-exclusive list are encouraged:
We invite submissions to two tracks:
Full papers: A full paper must be no longer than six pages, excluding the bibliography. There is no limit on the length of the bibliography. Full papers describe a complete work in data management for new hardware. Accepted papers will be given 10 pages (plus a bibliography) for the camera-ready version and a long presentation slot during the workshop.
Short Papers: Short papers must not exceed two pages, excluding the bibliography. Short papers describe very early-stage works or summaries of mature systems. Short papers will be included in the proceedings, given 4 pages (plus a bibliography) for the camera-ready version, and may be given a short presentation slot during the workshop.
All accepted papers (full and short) will also be presented as posters during a workshop poster session
This year all accepted DaMoN papers will be considered for a best paper award.
We intend to invite extended versions of a selection of DaMoN'26 papers for submission to the VLDB Journal. Extended papers that are accepted to the VLDB Journal will appear in a special section (“Best of DaMoN 2026”) within one of the regular VLDBJ issues.
Paper submission: February 16th, 2026 February 20th, 2026 (11:59pm AoE)
Notification of acceptance: March 30th, 2026 (11:59pm AoE)
Camera-ready copies: May 1st, 2026
Workshop: Monday June 1st, 2026
Authors are invited to submit original, unpublished research papers that are not being considered for publication in any other forum. Manuscripts should be submitted electronically as PDF files using the latest ACM paper format consistent with the ACM SIGMOD formatting guidelines to the DaMoN 2026 CMT site, at https://cmt3.research.microsoft.com/DaMoN2026 (available from February 1st onwards). Submissions will be reviewed in a single-blind manner. Submissions that are longer than six pages, excluding the bibliography, will be desk-rejected.
Accepted papers will be included in the informal online proceedings at the website. Additionally, all accepted papers will be published online in the ACM Digital Library. Therefore, the papers must include the standard ACM copyright notice on the first page.
TBD
TBD
Papers available for download at ACM portal
How to make Secure Storage fast for DBMSs in Intel SGXv2
Adrian Lutsch (TU Darmstadt)*; Christian Franck (TU Darmstadt); Muhammad El-Hindi (Technische Universität München); Norman May (SAP SE); Zsolt István (TU Darmstadt); Carsten Binnig (TU Darmstadt)
ScaleEvict: Altruistic Eviction for RDMA-Enabled Distributed Storage Engines
Till Steinert (Technische Universität München)*; Muhammad El-Hindi (Technische Universität München); Tobias Ziegler (TigerBeetle); Viktor Leis (Technische Universität München); Carsten Binnig (TU Darmstadt)
Efficient Parquet Parsing on FPGAs
Si Jun Kwon (TU Darmstadt)*; Zsolt István (TU Darmstadt); Daniel Ritter (SAP SE); Norman May (SAP SE); Christian Faerber (Altera Corporation)
Evaluating Apple Silicon for Data Processing
Alexander Beischl (Technical University of Munich)*; Mykola Morozov (Technical University of Munich); Michael Jungmair (Technical University of Munich); Thomas Neumann (Technical University of Munich); Lukas Haußmann (Technical University of Munich)
Compression-Aware LIKE: Matching Patterns in the FSST Domain
Calin-George Pop (Technical University of Munich)*; Adrian Riedl (Technical University of Munich); Thomas Neumann (Technical University of Munich)
Characterizing Multi-Host CXL.2.0: Latency, Bandwidth, and Synchronization Costs
Laurin Martins (TU Ilmenau)*; Alexander Baumstark (TU Ilmenau); Andreas Becher (TU Ilmenau); Kai-Uwe Sattler (TU Ilmenau)
Streaming with a Touch of DOM: a Lightweight Structural Index for JSON Queries
Ricardo Volker Kraft (Technical University of Munich); Mateusz Gienieczko (Technical University of Munich)*; Jana Giceva (Technical University of Munich)
GASP: GPU-Accelerated Shortest Path for Graph Analytics
Ian Di Dio Lavore (Politecnico di Milano); Rathijit Sen (Microsoft)*; Yuanyuan Tian (Microsoft)
Do GPUs Really Need New Tabular File Formats?
Jigao Luo (TU Darmstadt)*; Qi Chen (TU Darmstadt); Carsten Binnig (TU Darmstadt & DFKI)
BareHeap: Virtual Memory Assisted Memory Allocation for High Performance Query Processing
Marcus Müller (Technische Universität München)*; Viktor Leis (Technische Universität München)
Virtual-Memory Assisted Buffer Management In Tiered Memory
Yeasir Rayhan (Purdue University)*; Walid Aref (Purdue University)
Should I Hide My Duck in the Lake?
Jonas Dann (ETH Zürich)*; Gustavo Alonso (ETH Zürich)
ZARC: Re-inventing Zone Allocation for LSMs on ZNS SSD
Farhan S. Chowdhury (BUET); Shadman Saqib Eusuf (UMass Boston); Subhadeep Sarkar (Brandeis University); Tarikul Islam Papon (UMass Boston)*
Let the Hardware do it: Fast Graph Query processing through FPGA-accelerated Late Materialization and Decompression
Lei Chen (Technische Universität Ilmenau)*; Alexander Baumstark (Technische Universität Ilmenau); Andreas Becher ( Technische Universität Ilmenau); Daniel Ziener (Technische Universität Ilmenau); Kai-Uwe Sattler (Technische Universität Ilmenau)
Technische Universität München, Germany
jana.giceva@in.tum.de
Microsoft Gray Systems Lab
Rathijit.Sen@microsoft.com
Oracle Labs
eric.sedlar@oracle.com

EPFL, Switzerland
anastasia.ailamaki@epfl.ch

CWI, Netherlands
boncz@cwi.nl

CWI, Netherlands
stefan.manegold@cwi.nl

Columbia University, USA
kar@cs.columbia.edu
The Microsoft CMT service was used for managing the peer-reviewing process for this conference. This service was provided for free by Microsoft and they bore all expenses, including costs for Azure cloud services as well as for software development and support